Gas panel with improved write-erase and sustain circuits and operations

ABSTRACT

Improved waveforms are provided for a gas panel of the type in which light emitting cells are formed in an ionizable medium at the crossover points of set of horizontally and vertically extending insulated wires. The waveforms include a relatively wide, low amplitude, component and a relatively narrow, high amplitude, component that are individually incapable of producing an avalanche ionization but in combination produce ionization for write, erase, and sustain operations. The write-erase circuits associated with these waveforms have lower operating voltages, and the new sustain waveform provides improved operating margins.

United States Patent Criscimagna GAS PANEL WITH IMPROVED WRITE-ERASE AND SUSTAIN CIRCUITS AND OPERATIONS Tony N. Criscimagna, Woodstock. NY.

lnventor:

US. Cl. 315/169 TV; 340/324 M Int. C11... 1105B 37/00 Field of Search 315/169 TV, 169 R;

References Cited UNITED STATES PATENTS 8/1973 Auger 315/169 R X 9/1973 Johnson et a1. 315/169 TV 4/1974 Trogdon 315/169 R X TIMING 3.843.905 10/1974 Leuck et a1 315/169 R X Primary E.\'aminerR. V. Rolinec Assirrmzz Examfiner-Lawrence J. Dahl Attorney, Agent, or Firm-William S. Robertson [57] ABSTRACT Improved waveforms are provided for a gas panel of the type in which light emitting cells are formed in an ionizable medium at the crossover points of set of horizontally and vertically extending insulated wires. The waveforms include a relatively wide, low amplitude. component and a relatively narrow. high amplitude, component that are individually incapable of producing an avalanche ionization but in combination produce ionization for write, erase. and sustain operations. The write-erase circuits associated with these waveforms have lower operating voltages, and the new sustain waveform provides improved operating margins,

12 Claims, 4 Drawing Figures US. Patent Nov. 11, 1975 Sheet1of2 3,919,591

42 TIMING F I 4 44 W 15 V H 45 WRITE-ERASE 4? 5o 59 SUSTAIN 55 58 WRlTE- ERASE SUSTAIN F I G. 2

ONTAL 75 ER 24 A vERncAE B UPPER 55 68 M VERTICAL LOWER 54 SELECTED CELL I 64 l sEEEc T E o CELL l l 7 1 UNSELECTED CELL l I U.S. Patent N0v.11, 1975 Sheet20f2 3,919,591

FIG.3

VERTICAL SUSTAIN HORIZONTAL SUSTAIN T M NG FIG.4

GAS PANEL WITH IMPROVED WRITE-ERASE AND SUSTAIN CIRCUITS AND OPERATIONS Related Applications Introduction Gas panels of the type to which this invention relates have two glass plates that are spaced apart by a seal to contain an ionizable medium. A set of horizontally extending insulated conductors are located on one glass plate and a set of vertically extending conductors are located on the other plate. When a suitable voltage is applied between one horizontal conductor and one ver tical conductor, ionization occurs at the crossover point of the two conductors and light isemitted. The crossover points are called cells, and a display pattern is formed by ionizing selected cells. The operation of initially ionizing a cell is called writing. The operation of removing the wall charges from a previously written cell is called erasing. A cell is erased by applying a suitable voltage waveform to produce ionization so that conduction can occur in the cell to discharge the cell. One object of this invention is to provide improved waveforms for write and erase operations.

As a result of the ionization that occurs during writing, positive and negative charges accumulate on opposite insulating walls of the cell. The voltage of this charge opposes the voltage applied between the vertical conductor and the horizontal conductor so that the sum of these voltages quickly falls below the voltage required for ionization and light is emitted from the cell for only a brief instant. The write voltage waveform is maintained for a sufficient interval after the light is extinguished for a substantial charge to be stored on the cell walls. After the write operation, periodic light output of the cell is sustained by an alternating polarity voltage that is called a sustain voltage. The sustain pulse following the write operation is opposite in polarity to the write pulse and thus is of the same polarity as the charge that was stored on the cell walls by the preceding write operation. Since the cell ionizes at a voltage that is the sum of the applied voltage and the voltage of the stored charge, a previously written cell ionizes at an applied sustain voltage that is less than the write voltage. The sustain voltage is applied simultaneously to all cells and the previously written cells ionize and accumulate charge for the next sustain operation but the previously erased cells with zero wall charge remain un-ionized. Another object of this invention is to provide a new and improved waveform for a sustain operation.

A possible explanation for ionization in a gas panel will be helpful for understanding this invention. Independently of any voltage on the conductors of a cell, the cell medium ordinarily contains some free electrons and positive ions, and pilot lights may be located around the edge of the panel to establish a suitable level of ionization. The electrons and positive ions recombine and new ions are formed at an equalibrium rate. When a voltage is applied across the conductors of a cell, an electric field is formed in which the ions are accellerated so that ions collide more frequently with neutral atoms and thereby produce additional ions. At relatively low voltage levels an equalibrium condition may be reached where there is a high level of ionization but ions are lost by recombination as fast as they are created by collisions between atoms and ions. However, at some higher voltage level, ions are created faster than they are lost and "these ions in turn produce additional ionization so that an avalanche of free charges occurs. Thus, both of the height and the width of the cell voltage waveform are important in establishing whether avalanche ionization will occur. As has already been explained, avalanche ionization is required for write, erase, and sustain operations.

Summary Of The Invention The write and erase waveforms of this invention each have a relatively wide, low amplitude, component and a relatively high amplitude, narrow, component (called a voltage spike) The low voltage component is low enough in amplitude to be handled by integrated circuit components. For example, this voltage component may have an amplitude of about 24 volts across a cell so that the associated horizontal and vertical selection circuits are rated at only ,l2volts. The high voltage spike component is applied to the cell in such a way that this component does not appear across the selection circuits, as will be understood readily from the description of the preferred circuits. In the write waveform, the spike voltage is formed about the midpoint of the wider, low amplitude, component. The leading portion of the low amplitude component is sufficient in amplitude and width to establish a significantly increased level of ionization in a selected cell but to not produce a charge avalanche. The spike component is sufficient in ampli-' tude and width to produce an avalanche in a selected cell which has this increased ionization level but to not produce an avalanche in an unselected cell. The trailing portion of the wider component is sufficient in amplitude and width to produce suitable storage of charges on the walls of a selected cell. (Preferably the leading and trailing portions of the low amplitude component are equal in height.)

In the erase waveform of this invention, a spike voltage appears at or near the trailing edge of a low amplitude, wider, voltage component. The two components produce avalanche ionization in a selected cell in the way already described for a write operation, except that the transfer of charge is limited so as to leave the cell discharged.

The sustain waveform of this invention has a spike voltage on its leading edge followed by a relatively wide component that is generally similar to a conventional sustain pulse except that the operating margin is significantly wider. The margin is the difference between the minimum sustain voltage to ionize a previously written cell and the maximum sustain voltage, where previously erased cells begin to turn on. The spike voltage decreases the value of maximum sustain voltage slightly but it decreases the value of the minimum sustain voltage much more. Thus, adjustments to the circuits can be made over a wider range to compensate for variations in manufacture and variations that occur during operation.

Other objects, advantages, and features of the invention will be apparent from the following description of a detailed embodiment of the invention.

The Drawing THE GAS PANEL CIRCUIT AND OPERATION OF FIGS. 1 AND 2 Introduction A gas panel 12 has representative horizontal conductors 14, 15 and representative vertical conductors 16 and 17. Transistors 19 and 20 and associated resistors 21, 22 respond to selection signals at their base terminals to connect the associated horizontal conductors 14, 15 to either a lower horizontal sustain line 24 or an upper horizontal sustain line 25. Transistors 28, 29 and associated resistors 30, 31 similarly connect vertical conductors 16, 17 to either an upper vertical sustain line 33 or to a lower vertical sustain line 34. During a write or erase operation, a selected cell receives the voltage of upper horizontal line with respect to lower vertical line 34; an unselected cell receives the voltage of lower horizontal line 24 with respect to upper vertical line 33; and half selected cells receive the voltages of both upper lines 25, 33 or both lower lines 25, 34.

A sustain circuit 38 applies the sustain component of the waveform of FIG. 2 lines A and C to horizontal sustain lines 24 and 25, and a sustain circuit 40 applies the sustain component of the waveform of FIG. 2 lines B and D to vertical sustain lines 33 and 34. A write-erase circuit 41 applies write and erase pulses between lower horizontal sustain line 24 and upper horizontal sustain line 25, and a write-erase circuit 42 applies write and erase pulses between lower vertical sustain line 34 and upper vertical sustain line 33. Preferably, the writeerase circuits include a transformer secondary winding connected to establish a voltage between the upper and lower, sustain lines, and the sustain voltage is applied to a mid pointof the winding. A timing circuit 43 provides inputs to circuits 38, 40, 41, 42 to establish the period of the sustain waveform and to establish the rise and fall of the write and erase pulses within this period.

The components that have been described so far (except for resistor 39) are conventional except for the specific timings of circuit 43 and except that the selection circuit transistors 19, 20, 28, 29 may be lower voltage components than these transistors in conventional gas panels. The cited applications will be a helpful introduction to a variety of detailed implementations that are well known for gas display panels.

The Spike Pulse Generator A circuit 45 generates a spike component in the write and erase waveform. Preferably a transistor 46 and a resistor 47 are connected with a potential point 48 that is suitable to form a current source. A transformer 50 connects transistor 46 to turn on in response to a signal that timing circuit 43 produces on a line 51. This current flows in the circuit of resistor 39 and thereby establishes a predetermined voltage between sustain circuit 38 and the horizontal sustain lines 24, 25. Since the spike voltage appears on both horizontal sustain lines 24 and 25, the voltage does not appear across transistors 19, 20 and these low voltage components are isolated from the high voltage of circuit 45. The spike voltage appears on each horizontal conductor 14, 15 without regard to the state of the associated transistor switch 19, 20. The spike voltage is not applied to the vertical sustain lines 33, 34 or the corresponding vertical conductors 16, 17.

The dimensions of the waveforms of FIG. 2 will depend on the particular gas panel for which a circuit is designed. The following example is illustrative:-

The spike width is in microseconds and the spike voltage is in volts. The product is an indication of the energy provided by the spike voltage. The sustain voltages are values for which the component of the write pulse handled by the selection circuits is about 12 volts. Thus, the write circuit and operation of this invention avoid the need for high voltage selection switches and thereby permit a substantial portion of the circuit to be constructed as a low voltage, integrated circuit device.

The Write Operation FIG. 2 shows the waveforms for a conventional sustain operation as a reference for understanding the write and erase operations. The conventional sustain operation produces an alternating polarity voltage across each cell of the gas panel as shown in lines E, F, and G of FIG. 2. The sustain pulse (or an equivalent pulse) during the write and erase operations may form a pedestal for the write and erase pulses. During a write operation, a selected cell receives the waveform of FIG. 2 line E. This waveform includes a sustain voltage component 63, a component 64 formed by the writeerase circuit, and a spike 65 formed by circuit 45. This waveform is the voltage at horizontal upper sustain line 25 with respect to the voltage on lower vertical sustain line 34 (lines C and D in FIG. 2). Component 64 is formed by a positive write pulse 66 on horizontal upper sustain line 25 and a'negative write pulse 67 on lower vertical sustain line 33. The spike voltage 65 appears on each cell.

Lines F and G in FIG. 2 show the effect of the write pulse on half selected cells and unselected cells. A half selected cell in the same row as a selected cell receives the voltage on line 25 with respect to the voltage on line 33 (lines B and C in FIG. 2). The positive write pulse 66 on line 25 and the positive pulse 68 on line 34 cancel, as shown in line F of FIG. 2. Similarly, a half selected cell in the same column as a selected cell receives the voltage on lower horizontal sustain line 24 with respect to lower vertical sustain line 34 and the two negative write pulses cancel, as lines A, D, and F in FIG. 2 show. An unselected cell receives the waveform of lower horizontal sustain line 24 with respect to upper vertical sustain line 33, as shown in lines A, B, and G of FIG. 2.

The Erase Operation In an erase operation the sustain pulse is interrupted (either by' turning off the horizontal sustain pulse generator 38 as shown in FIG. '2 or equivalently by tuming on vertical sustain pulse generator 40) and the selected cell receives an erase circuit component 70 and a spike component 71 as shown in line E of FIG. 2. Component 70 is formed by a positive erase pulse 72 formed on the horizontal upper sustain line and a negative pulse 73 formed on the lower vertical sustain line 34 (lines C and D in FIG. 2). Half selected cells receive either two positive erase pulses 72 and 74 or two negative erase pulses 73 and 75 which cancel as shown in line F of FIG. 2. An unselected cell receives the negative pulse 75 on line 24 and the positive pulse 74 on line 33 which produce the negative pulse 76 shown in line G of FIG. 2. With the fall of the spike 71, the sustain operation is resumed with zero wall voltage on a cell selected for the erase operation.

The amplitudes and widths of the components of the erase waveform for a particular gas panel can be readily found. For example, component 70 may be 2 to 4 microseconds in width and have a rise time of 0.2 microseconds. The spike may have a width of about 018 microseconds with a rise time of 0.2 microseconds and a fall time of 0.2 microseconds. The amplitude of the spike may be equal to the sustain voltage level.

Other Embodiments FIG. 1 shows a single spike generator 45 arranged to provide spikes of equal amplitude for both the write and the erase operation. Various circuits are known for providing write and erase spikes of independent amplitudes; a circuit of this type is shown in the cited application of Criscimagna and Piston, or a circuit similar to spike circuit 45 except for the value of resistor 47 can be connected to produce a selected current at the common connection point of resistor 39 and the collector terminal of transistor 46. When the sustain pulse is interrupted for an erase operation by turning on sustain circuit so that lines 24, 25, 33, 34 receive equal positive sustain voltage amplitudes, the spike voltage may be formed by momentarily turning off sustain generator 40 or equivalently by applying a negative pulse. to vertical sustain lines 33, 34 by means of a circuit such as spike generator 45. Spike voltages may be formed by half select voltages applied to the horizontal and vertical conductors.

The cited application of Lamoureux describes a display having a somewhat simpler sustain waveform; the

modifications to such a display to provide the write and erase waveforms of this invention will be readily apparent from the preceding description and illustrates the application of this invention to a variety of gas panel designs.

THE SUSTAIN CIRCUIT AND OPERATION OF FIGS. 3 AND 4 The Sustain Circuit The lower horizontal sustain line 24 and the lower vertical sustain line 34 in FIG. 3 will be recognized as counterparts of lines 24 and 34 in FIG. 1 and these lines are interconnected with the selection circuits and other components as shown in FIG. 1. Four transistors 80, 81, 82, and 83 form a sustain circuit for switching lines 24, 34 between a point 85 of positive sustain level po- 6 tential and ground in response to signals from a timing circuit 43. (Such a sustain circuit is shown in detail in the application of Lamoureux.) A timing circuit 43 provides signals at the base terminals of the transistors to produce the sustain waveforms. For example, a positive pulse is formed on horizontal sustain line 24 by turning on transistor 81 and turning off transistor and a zero level is formed on lines 24 by turning on transistor 80 and turning off transistor 81. A spike generator 45 is connected to receive a timing signalfrom timing circuit 43 and to produce a voltage pulse across a resistor 39 that couples spike generator 45 to the sustain circuit. Resistor 47 and positive potential point 48 have values to establish a current that is appropriate in the circuit of resistor 39 to establish the spike voltage.

Operation Line A in FIG. 4 shows the waveform on lower horizontal sustain line 24. This Waveform has a component that is formed when transistor 81 is turned on and it has a spike component 91 that is formed by'turning on the spike generator circuit 45. Similarly, the lower vertical sustain waveformon line 34 that is shown in line B of FIG. 4 has a component 92 formed by turning on transistor 83 and a spike component 93 that is formed by turning on the spike generator. As line C in FIG. 4 shows, these waveforms combine at the light emitting cells of the display to form components 94, 95 that are generally similar to the conventional sustain waveform already described and to form :spike components 96, 97. As an example, the-spike components may be about 40 volts in amplitude and two microseconds in width, and the wider components 94, 95 may be less than the voltage that would normally be required for a sustain operation in the'absence of the spikes.

In the circuit of FIG. 3, potential point 85 may be made adjustable for setting the sustain voltage components'94, 95 to an appropriate value without changing the height of the spike component. Alternatively, point 85 may be made adjustable with resistor 39 for adjusting components 94, 95 to a selected value and adjusting the spike to a constant height with respect to ground; in this arrangementthe spike height above ground may be made equal to the maximum sustain voltage level and components 94,95 may be variable between this level (as a conventional sustain pulse) and a minimum value. The sustain waveform may be unsymetrical with a spike only on pulses of one polarity.

The sustain circuits and operations of FIGS. 3 and 4 can be used with the write-erase circuit and operation of FIGS. 1 and 2, or the write-erase circuit can be used with a conventional sustain operation and the sustain circuit can be used with a conventional write-erase operation. Waveforms of the general type shown on line C of FIG. 4 appear in the operation of various kinds of circuits, and such circuits can be readily modified to produce the sustain waveform of this invention.

Those skilled in the art will recognize variations in specific detail of the waveforms that have been disclosed and a variety of circuits for forming suitable waveforms and adapting them to gas display panels of various kinds within the spirit of the invention and the scope of the claims.

What is claimed is:

1. In a gas panel of the type having light emitting cells formed at crossover points of horizontal and vertical sets of conductors and in which avalanche ionization occurs in a light emitting cell at predetermined conditions of amplitude and width of a voltage pulse applied across the conductors of a cell, and having means for producing alternating polarity sustain pulses between said sets of conductors, a circuit for an improved voltage waveform for write operations on an addressed cell comprising,

means for producing a first relatively wide voltage pulse having an amplitude and width that are sufficient in combination by algebraic addition with a sustain voltage level waveform to produce a predetermined increased ionization level in an addressed cell that is less than avalanche ionization,

means for producing a second relatively narrow pulse having an amplitude that is sufficient in combination by algebraic addition with said first pulse and said sustain voltage level waveform to produce avalanche ionization but-having a width insufficient to produce avalanche ionization in the absense of said first pulse,

means for applying said first and second pulses to said addressed cell with said sustain level pulse and means for timing said second pulse to occur at a predetermined point during the occurrence of said first pulse.

2. The circuit of claim 1 wherein said timing means includes means timing said second pulse to occur at approximately the midpoint of said first pulse.

3. The circuit of claim 1 wherein said timing means includes means for timing said second pulse to occur at a point of said first pulse such that a leading portion of said first pulse produces an increased level of ionization short of avalanche ionization, said second pulse produces avalanche ionization in the selected cell, and a trailing portion of said first pulse produces an accumulation of charges on the walls of a cell from said avalanche ionization.

4. The circuit of claim 3 wherein said leading and trailing portions of the said first pulse are substantially equal in amplitude.

5. The circuit of claim 1 wherein said timing means includes means for interrupting said sustain pulse during the occurrence of said first and second pulses,

said means for producing first and second pulses includes means establishing amplitudes and widths for discharging the walls of a cell selected for an erase operation and,

said means for applying said pulses includes means for applying said first and second pulses in coincidence to said selected cell.

8 6. The circuit of claim 5 wherein said timing means includes means for producing said second pulse near the trailing edge of said first pulse.

7. The circuit of claim 1 wherein said means for pro- 5 ducing said first pulse includes an upper and a lower line for said horizontal conductors and means for producing half the voltage of said first pulse across said upper and lower horizontal lines and includes an upper and a lower line for said vertical conductors and means for producing half the voltage of said first pulse across said upper and lower vertical lines, and

wherein said means for applying said first and second pulses to said conductors includes a first plurality of low voltage semiconductor switches for connecting each of said horizontal conductors to one of said upper and lower horizontal lines and a second plurality of low voltage semiconductor switches for connecting each of said vertical conductors to one of said upper and lower vertical lines for applying said first pulse to said cell.

8. The circuit of claim 7 wherein said means for applying said first and second pulses to said cell comprises means for connecting an upper and a lower line for one of said sets of conductors to receive said second pulse, whereby said second pulse appears as a voltage difference across said conductors but not across said semiconductor switches.

9. The circuit of claim 6 wherein said timing means includes means establishing said second pulse at about the midpoint of said first pulse for a write operation and near the trailing edge of said first pulse for an erase operation.

10. The circuit of claim 9 wherein said means for producing said sustain pulse includes means forming a relatively wide portion of said pulse and a voltage spike on the leading edge of said wide portion.

11. A sustain circuit for a gas panel comprising,

means for producing alternating polarity pulses of an amplitude less than the voltage at which a sustain operation occurs, means for producing a spike voltage on the leading edge of said pulses in the polarity of the associated one of said pulses and,

means for applying said pulses with said spike voltage to said gas panel for a sustain operation.

12. The sustain circuit of claim 11 wherein said circuit includes means for adjusting the amplitude of said pulse over a range of amplitudes less than the level for a sustain operation. 50 

1. In a gas panel of the type having light emitting cells formed at crossover points of horizontal and vertical sets of conductors and in which avalanche ionization occurs in a light emitting cell at predetermined conditions of amplitude and width of a voltage pulse applied across the conductors of a cell, and having means for producing alternating polarity sustain pulses between said sets of conductors, a circuit for an improved voltage waveform for write operations on an addressed cell comprising, means for producing a first relatively wide voltage pulse having an amplitude and width that are sufficient in combination by algebraic addition with a sustain voltage level waveform to produce a predetermined increased ionization level in an addressed cell that is less than avalanche ionization, means for producing a second relatively narrow pulse having an amplitude that is sufficient in combination by algebraic addition with said first pulse and said sustain voltage level waveform to produce avalanche ionization but-having a width insufficient to produce avalanche ionization in the absense of said first pulse, means for applying said first and second pulses to said addressed cell with said sustain level pulse and means for timing said second pulse to occur at a predetermined point during the occurrence of said first pulse.
 2. The circuit of claim 1 wherein said timing means includes means timing said second pulse to occur at approximately the midpoint of said first pulse.
 3. The circuit of claim 1 wherein said timing means includes means for timing said second pulse to occur at a point of said first pulse such that a leading portion of said first pulse produces an increased level of ionization short of avalanche ionization, said second pulse produces avalanche ionization in the selected cell, and a trailing portion of said first pulse produces an accumulation of charges on the walls of a cell from said avalanche ionization.
 4. The circuit of claim 3 wherein said leading and trailing portions of the said first pulse are substantially equal in amplitude.
 5. The circuit of claim 1 wherein said timing means includes means for interrupting said sustain pulse during the occurrence of said first and second pulses, said means for producing first and second pulses includes means establishing amplitudes and widths for discharging the walls of a cell selected for an erase operation and, said means for applying said pulses includes means for applying said first and second pulses in coincidence to said selected cell.
 6. The circuit of claim 5 wherein said timing means Includes means for producing said second pulse near the trailing edge of said first pulse.
 7. The circuit of claim 1 wherein said means for producing said first pulse includes an upper and a lower line for said horizontal conductors and means for producing half the voltage of said first pulse across said upper and lower horizontal lines and includes an upper and a lower line for said vertical conductors and means for producing half the voltage of said first pulse across said upper and lower vertical lines, and wherein said means for applying said first and second pulses to said conductors includes a first plurality of low voltage semiconductor switches for connecting each of said horizontal conductors to one of said upper and lower horizontal lines and a second plurality of low voltage semiconductor switches for connecting each of said vertical conductors to one of said upper and lower vertical lines for applying said first pulse to said cell.
 8. The circuit of claim 7 wherein said means for applying said first and second pulses to said cell comprises means for connecting an upper and a lower line for one of said sets of conductors to receive said second pulse, whereby said second pulse appears as a voltage difference across said conductors but not across said semiconductor switches.
 9. The circuit of claim 6 wherein said timing means includes means establishing said second pulse at about the midpoint of said first pulse for a write operation and near the trailing edge of said first pulse for an erase operation.
 10. The circuit of claim 9 wherein said means for producing said sustain pulse includes means forming a relatively wide portion of said pulse and a voltage spike on the leading edge of said wide portion.
 11. A sustain circuit for a gas panel comprising, means for producing alternating polarity pulses of an amplitude less than the voltage at which a sustain operation occurs, means for producing a spike voltage on the leading edge of said pulses in the polarity of the associated one of said pulses and, means for applying said pulses with said spike voltage to said gas panel for a sustain operation.
 12. The sustain circuit of claim 11 wherein said circuit includes means for adjusting the amplitude of said pulse over a range of amplitudes less than the level for a sustain operation. 